The performance levels of various semiconductor devices, such as transistors, are at least partly dependent on the mobility of charge carriers (e.g., electrons and/or electron vacancies, which are also referred to as holes) through the semiconductor device. In a transistor, the mobility of the charge carriers through the channel region is particularly important.
The mobility of charge carriers can be affected by various factors. For example, a rough surface of a particular layer of a device may decrease charge carrier mobility through that layer of the device. Dislocations of charge carriers may also reduce charge carrier mobility by creating a local scatter area for the charge carriers, which can act as a leakage path that causes power loss through that section of the device.
The problems associated with dislocations are not isolated to a single layer of the device. Specifically, dislocations on an existing device layer can propagate through additional layers that are formed on the existing layer. Thus, the dislocations exhibited by one layer can subsequently migrate and inhibit charge carrier mobility throughout one or more layers of the final device.
Various techniques have been used to improve charge carrier mobility in semiconductor devices. For example, the epitaxial growth process typically used to form layers of a device can be significantly slowed down to reduce the number of defects (e.g., dislocations) in the final device. However, devices constructed according to this technique still generally have dislocations on the order of approximately 100,000 per square centimeter.
Alternatively, a chemical-mechanical polish (“CMP”) can be used to reduce the thickness of a layer of a device and simultaneously smooth the surface of the reduced layer, which can enhance charge carrier mobility. However, the CMP process is relatively costly and complex due to the fact that the CMP process requires at least two additional modules besides the epitaxial growth module (e.g., the CMP module and a cleaning module to clean the device layer after the CMP procedure). From an infrastructure standpoint, the additional modules for the CMP process require generally costly items such as a slurry supply, waste disposal, and additional space.
Moreover, the CMP process requires moving the device layer between modules, which exposes the device layer to atmospheric contaminants and native oxides, both of which can result in impurities that can cause an increase in defects on the device layer. Device layers constructed according to the CMP technique generally have dislocations on the order of approximately 10,000 per square centimeter.